1. Field of the Invention
The present invention relates to a method and apparatus for configuring a number of lanes to be connected to each access port of a bus, and more particularly, to a method and apparatus for realizing different lane configurations with an identical circuit design.
2. Description of the Prior Art
A computer system is one of the most important hardware devices in modern information society. As the computer system is widely used in various applications, different requirements of different applications are demanded. For example, a personal computer is often used to play multi-media video and audio, so the efficiency of network information transmission management is regarded, on the other hand, the efficiency of image signal processing is ignored. Therefore, how to satisfy various requirements of different applications in the computer system is becoming more important.
In general, a computer system includes: a central processing unit, a system memory for providing memory resources, a chipset, and various peripheral devices/circuits. The central processing unit executes programs, processes data and handles the computer functions. The system memory can be a dynamic random access memory. The peripheral devices/circuits includes: a display card with capable of accelerating an image processing efficiency, a network card with able to be connected to a network for manipulating network data transmission, and a variety of input/output interfaces and nonvolatile storage devices. The chipset is connected between the central processing unit, the system memory, and the peripheral devices/circuits for coordinating and managing data transmission among these devices.
In order to manage the data transmission, the chipset is connected to the peripheral devices/circuits via a bus, so that each peripheral device/circuit can access the central processing unit and the system memory via the bus and the chipset.
In order to improve the efficiency for each peripheral device/circuit to access the data from the bus, a modern bus standard is designed to realize a scalable data transmission bandwidth (total data flew in a unit period). For example, in a new generation peripheral communication interconnect-express (PCIE) standard, the chipset is connected to a peripheral device via a bus of an access port. The bus of different access ports may have different numbers of physical signal transmission lanes. Access ports with different numbers of lanes can serve different bandwidths to a corresponding peripheral device. For example, there have an access port A with a lane and an access port B with two lanes. Since any two lanes have equal data transmission bandwidths, the access port B can transmit data by the two lanes at the same time. That is, data transmission bandwidth of access port B is twice of the data transmission bandwidth of the access port A. Likewise, an access port with four lanes can transmit data over four times (×4) data transmission bandwidth; and an access port with eight lanes can transmit data over a eight times (×8) data transmission bandwidth; and an access port with sixteen lanes can transmit data over a sixteen times (×16) data transmission bandwidth.
In a conventional chipset, the access port configured to a fixed numbers of lanes. For example, a conventional chipset provides an access port with 16 lanes, and one or two access ports with single lane. The access port with 16 lanes is used to connect to a display card, so that the chipset can use 16 times data transmission bandwidth to transmit data to improve the image processing efficiency of the computer system. However, as mentioned previously, many applications do not need to ultimate image processing efficiency. Instead, in some applications, four or eight times data transmission bandwidth is needed to serve the other kinds of peripheral devices. For example, a computer system being as a server needs more than one access port with 4 lanes to manage its network peripheral devices. That is to say, since the conventional chipset has fixed numbers of lanes, the access port can neither provide various data transmission bandwidths applied in different applications, nor meet the requirements of different computer systems in different applications.